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| M54HC73 RAD HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR s s s s s s s s s s s HIGH SPEED: fMAX = 80MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =2A(MAX.) at TA=25C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 73 SPACE GRADE-1: ESA SCC QUALIFIED 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION DEVICE FULLY COMPLIANT WITH SCC-9203-071 DILC-14 FPC-14 ORDER CODES PACKAGE DILC FPC FM M54HC73D M54HC73K EM M54HC73D1 M54HC73K1 DESCRIPTION The M54HC73 is an high speed CMOS DUAL J-K FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. Depending on the logic level applied to J and K inputs, this device changes state on the negative going transition of clock input pulse (CK). The clear function is accomplished independently of the clock condition when the clear input (CLR) is taken low. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION June 2004 Rev. 1 1/11 M54HC73 Figure 1: IEC Logic Symbols Figure 2: Input And Output Equivalent Circuit Table 1: Pin Description PIN N 1, 5 2, 6 12, 9 13, 8 14, 7, 3, 10 11 4 SYMBOL 1CK, 2CK NAME AND FUNCTION Clock Input Asynchronous Reset 1CLR, 2CLR Inputs 1Q, 2Q True Flip-Flop Outputs Complement Flip-Flop 1Q, 2Q Outputs 1J, 2J, 1K, Synchronous Inputs 2K Flip-Flop 1 and 2 GND Ground (0V) VCC Positive Supply Voltage Table 2: Truth Table INPUTS CLR L H H H H H X : Don't Care OUTPUTS FUNCTION K X L H L H X CK X Q L Qn L H Qn Qn Q H Qn H L Qn Qn CLEAR NO CHANGE ------TOGGLE NO CHANGE J X L L H H X 2/11 M54HC73 Figure 3: Logic Diagram Table 3: Absolute Maximum Ratings Symbol VCC VI VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 20 25 50 300 -65 to +150 265 Unit V V V mA mA mA mA mW C C ICC or IGND DC VCC or Ground Current Power Dissipation PD Tstg TL Storage Temperature Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied Table 4: Recommended Operating Conditions Symbol VCC VI VO Top tr, tf Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC = 2.0V VCC = 4.5V VCC = 6.0V Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to 125 0 to 1000 0 to 500 0 to 400 Unit V V V C ns ns ns 3/11 M54HC73 Table 5: DC Specifications Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 VOL Low Level Output Voltage 2.0 4.5 6.0 4.5 6.0 II ICC Input Leakage Current Quiescent Supply Current 6.0 6.0 IO=-20 A IO=-20 A IO=-20 A IO=-4.0 mA IO=-5.2 mA IO=20 A IO=20 A IO=20 A IO=4.0 mA IO=5.2 mA VI = VCC or GND VI = VCC or GND TA = 25C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.18 5.68 2.0 4.5 6.0 4.31 5.8 0.0 0.0 0.0 0.17 0.18 0.1 0.1 0.1 0.26 0.26 0.1 2 1.9 4.4 5.9 4.13 5.63 0.1 0.1 0.1 0.33 0.33 1 20 Typ. Max. Value -40 to 85C Min. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 1 40 A A V V Max. -55 to 125C Min. 1.5 3.15 4.2 0.5 1.35 1.8 Max. V Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage VIL V VOH 4/11 M54HC73 Table 6: AC Electrical Characteristics (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 TA = 25C Min. Typ. 30 8 7 42 14 12 54 18 15 15 60 80 18 6 6 21 7 6 30 8 6 Max. 75 15 13 125 25 21 145 29 25 4.8 24 28 75 15 13 75 15 13 75 15 13 0 0 0 75 15 13 95 19 16 95 19 16 95 19 16 0 0 0 95 19 16 Value -40 to 85C Min. Max. 95 19 16 155 31 26 180 36 31 4 20 24 110 22 19 110 22 19 110 22 19 0 0 0 110 22 19 -55 to 125C Min. Max. 110 22 19 190 38 32 220 44 37 ns Unit tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (CK - Q) tPLH tPHL Propagation Delay Time (CLR - Q) fMAX Maximum Clock Frequency Minimum Pulse Width (CK) Minimum Pulse Width (CLR) Minimum Set-up Time Minimum Hold Time Minimum Removal Time ns ns 6 30 35 MHz tW(H) tW(L) tW(L) ns ns ts ns th ns tREM 25 7 6 ns Table 7: Capacitive Characteristics Test Condition Symbol Parameter VCC (V) 5.0 5.0 TA = 25C Min. Typ. 5 35 Max. 10 Value -40 to 85C Min. Max. 10 -55 to 125C Min. Max. 10 pF pF Unit CIN CPD Input Capacitance Power Dissipation Capacitance (note 1) 1) CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per FLIP/ FLOP) 5/11 M54HC73 Figure 4: Test Circuit CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50) Figure 5: Waveform - Minimum Removal Time (f=1MHz; 50% duty cycle) 6/11 M54HC73 Figure 6: Waveform - Minimum Pulse Width, Propagation Delay Time (f=1MHz; 50% duty cycle) Figure 7: Waveform - Propagation Delay Time, Minimum Pulse Width, Setup And Hold Time (f=1MHz; 50% duty cycle) 7/11 M54HC73 DILC-14 MECHANICAL DATA mm. DIM. MIN. A a1 a2 B b b1 D E e e1 e2 F I K L 10.90 1.14 1.27 15.11 7.62 7.11 2.1 3.00 0.63 1.82 0.40 0.20 18.79 7.36 0.88 2.03 0.45 0.254 19.00 7.62 2.54 15.24 7.87 15.37 8.12 7.75 3.70 12.1 1.5 0.429 0.045 0.050 0.595 0.300 0.280 TYP MAX. 2.54 3.70 1.14 2.39 0.50 0.30 19.20 7.87 MIN. 0.083 0.118 0.025 0.072 0.016 0.008 0.740 0.290 0.035 0.080 0.018 0.010 0.748 0.300 0.100 0.600 0.310 0.605 0.320 0.305 0.146 0.476 0.059 TYP. MAX. 0.100 0.146 0.045 0.094 0.020 0.012 0.756 0.310 inch 0016173H 8/11 M54HC73 FPC-14 MECHANICAL DATA mm. DIM. MIN. A B C D E F G H L M N 18.75 0.38 4.31 0.38 6.75 9.76 1.49 0.10 7.50 0.127 7.62 1.27 0.43 6.0 22.0 0.738 0.015 0.170 0.48 0.015 TYP 6.91 9.95 MAX. 7.06 10.14 1.95 0.15 7.75 MIN. 0.266 0.384 0.059 0.004 0.295 0.005 0.300 0.050 0.017 0.236 0.866 0.019 TYP. 0.272 0.392 MAX. 0.278 0.399 0.077 0.006 0.305 inch F G D H 14 8 A N L 1 7 H E B M C 016029E 9/11 M54HC73 Table 8: Revision History Date 01-Jun-2004 Revision 1 First Release Description of Changes 10/11 M54HC73 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2004 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 11/11 |
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